Download Chemical-Mechanical Polishing of Low Dielectric Constant by Christopher L. Borst, William N. Gill, Ronald J. Gutmann PDF

By Christopher L. Borst, William N. Gill, Ronald J. Gutmann (auth.)

As semiconductor brands enforce copper conductors in complex interconnect schemes, study and improvement efforts shift towards the choice of an insulator which may take greatest benefit of the decrease strength and swifter sign propagation allowed by means of copper interconnects. one of many major demanding situations to integrating a low-dielectric consistent (low-kappa) insulator as a substitute for silicon dioxide is the habit of such fabrics in the course of the chemical-mechanical planarization (CMP) technique utilized in Damascene patterning. Low-kappa dielectrics are typically softer and no more chemically reactive than silicon dioxide, delivering major demanding situations to profitable elimination and planarization of such fabrics.

The concentration of this booklet is to merge the complicated CMP types and mechanisms that experience developed long ago decade with fresh experimental effects with copper and low-kappa CMP to boost a finished mechanism for low- and high-removal-rate tactics. the result's a better inspect the basic response kinetics that regulate, selectively eat, and finally planarize a multi-material constitution in the course of Damascene patterning.

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Extra info for Chemical-Mechanical Polishing of Low Dielectric Constant Polymers and Organosilicate Glasses: Fundamental Mechanisms and Application to IC Interconnect Technology

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Rogojevic, S. N. L. Plawsky, "Processing Dependent Thermal Conductivity in Nanoporous Silica Xerogel Films", J. Applied Physics, In Press (2002). S. J. Brinker, and AJ. Hurd, Journal of Non-Crystalline Solids, 190, 264-275 (1995). S. J. Brinker, AJ. M. Rao, Nature, 374,439-443 (March 1995). W. R. Buckley, Mat. Res. Soc. Symp. , 476, 99-110 (1997). 2]. Nonplanarity is introduced to the wafer surface at the transistor isolation level and increases as the number of metal layers increases. CMP is the process of physically removing material from places of high topography to flatten and level the wafer surface.

Jain, S. Rogojevic, S. N. L. Plawsky, "Processing Dependent Thermal Conductivity in Nanoporous Silica Xerogel Films", J. Applied Physics, In Press (2002). S. J. Brinker, and AJ. Hurd, Journal of Non-Crystalline Solids, 190, 264-275 (1995). S. J. Brinker, AJ. M. Rao, Nature, 374,439-443 (March 1995). W. R. Buckley, Mat. Res. Soc. Symp. , 476, 99-110 (1997). 2]. Nonplanarity is introduced to the wafer surface at the transistor isolation level and increases as the number of metal layers increases.

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