By A. R. Alvarez (auth.), A. R. Alvarez (eds.)
The subject of bipolar appropriate CMOS (BiCMOS) is an engaging one and of ever-growing functional significance. The "technology pendulum" has swung from the 2 extremes of preeminence of bipolar within the Fifties and 60s to the obvious never-ending horizons for VLSI NMOS expertise throughout the Seventies and 80s. but beginning within the Eighties severallimits have been clouding the horizon for natural NMOS expertise. CMOS reemerged as a· achievable excessive density, excessive functionality know-how. equally via the mid Nineteen Eighties scaled bipolar units had not just validated new excessive pace documents, yet early types of combined bipolar/CMOS know-how have been being produced. consequently the paradigm of both excessive density . Q[ excessive pace used to be metamorphasizing into a chance for either pace and density through a BiCMOS process. Now as we method the Nineteen Nineties there were a couple of useful demonstrations of BiCMOS either for reminiscence and good judgment functions and that i anticipate the fashion to improve over the subsequent decade. This publication makes a well timed contribution to the sphere of BiCMOS know-how and circuit improvement. The evolution is now certainly fast in order that it's tough to make this type of booklet exhaustive of present advancements. most likely both tricky is the truth that the hot know-how opens more than a few novel circuit possibilities which are as but purely formative of their improvement. Given those stumbling blocks it's a herculean activity to attempt to collect a ebook on BiCMOS.
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Extra resources for BiCMOS Technology and Applications
41 - 42. 16] N. Tamba S. Miyaoka, M. Odaka, M. Hirao, K. Ogiue, K. Tamada, T. Ikeda, H. Higuchi, H. Uchida, "An 8ns 256K BiCMOS SRAM," 1988 Int. Solid State Circuits Conference, pp. 184 - 185. R. Alvarez, J. W. Schucker, T. B. Liang, M. Dydyk, I. Rahim, "Second Generation BiCMOS Gate Array Technology," 1987 Bipolar Circuits and Technology Meeting, pp. 113 - 117. 18] T. Hotta, I. Masuda, H. Maejima, A. Hotta, "CMOS/Bipolar Circuits for 60MHz Digital Processing," 1986 Int. Solid State Circuits Conference, pp.
18). Horizontal Design Issues. Besides vertical constraints, the horizontal dimensions play an important role in the intrinsic device parameters. Since the base resistance is proportional to the width of the emitter and inversely proportional to its length, narrow emitters with W/L aspect ratios of one third or less are preferred. 19). This is especially a concern for single-base-contacted devices which are used because of the smaller silicon real estate that they consume compared to dual-base-contacted devices.
J. tQc J. J. t t t t J. t t J. 2. First order effects on NPN parameters, for increasing Q,. Wb> and Q,. 33] have proposed a method for NPN device design, graphically depicted in fig. 22. First order NPN device design. The vertical profile design is set to optimize device delay, while optimal horizontal design minimizes the parasitics. 34]. © 1988 IEEE. far. Circuit requirements determine the current density of the device. This sets the minimum collector doping and maximum epi thickness based on Kirk effect considerations.